Intrusive Routing for Improved Standard Cell Pin Access

Routability in a standard cell-based physical design flow has emerged as a critical objective in order to meet tight scaling and area requirements while conforming to the increasingly complex design rules. Access to the cell I/O pins can become severely limited based on constraints such as local routing resources, number of tracks, pre-existing nets blocking approach directions, and so on. In this work, we explore a novel approach for enhancing the capabilities of a commercial router aimed at improving pin access and consequently design area utilization. In the proposed intrusive routing methodology, the router would be given the ability to rip-up and change the pre-existing routing configurations inside standard cells, in order to try and achieve a better solution for the particular local scenario. Several approaches are discussed that tradeoff solution optimality with runtime and output reliability. We have implemented a framework tool flow enabling one of the different proposed ideas to validate the idea. As a baseline, this proof-of-concept, sub-optimal implementation achieves equivalent utilization compared to a standard methodology for various routing-constrained design benchmarks. Having thus validated our flow, we seek to incrementally extend the framework towards a complete implementation in the future.